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1/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. system power supply ics for ccd camera of mobile phones power supply for ccd camera module bd6039gu description bd6039gu is system power supply lsi for ccd camera that supplies all voltage sources for ccd camera. this ic has step up dc/dc converter and ldo for ccd sensor, inverted dc/dc converter for ccd sensor, and ldo (7ch). rega, reg1, reg8, reg5 can be connected the power supply independent from vbat. each output voltage has an adjustable by the register, and this ic can correspond to various ccd modules. a necessary power supply for ccd camera system is integr ated into 1chip, and it contributes to space saving. bd6039gu achieves compact size with the chip size package. features 1) the bd6039gu is equipped with all voltage sources for ccd camera system. 2) each output has an adjustable voltage; hence this ic can correspond to various ccd modules. 3) the bd6039gu is controlled by i 2 c bus format. 4) the bd6039gu employs 4.8mm 2 chip size package, so this ic achieves compact size. functions 1) step up dc/dc converter and ldo for ccd sensor (+15v/+14.5v/+13v) 2) inverted dc/dc converter for ccd sensor (-8v/-7.5v/-7v) 3) 7ch series regulator reg1 : 1.2v, iomax=210ma reg2 : 3.0v, iomax=50ma reg5 : 1.5v/1.8v, iomax=100ma reg6 : 3.2v/3.3v, iomax=260ma reg7 : 3.0v/3.3v, iomax=50ma reg8 : 1.5v/1.8v, iomax=100ma rega : 1.5v/1.8v, iomax=100ma 4) correspondence to i 2 c bus format 5) thermal shutdown (auto-return type) 6) vcsp85h4 chip size package (1.0mm max) absolute maximum ratings(ta=25 ) parameter symbol ratings unit maximum applied voltage 1 (note 1) vmax1 20 v maximum applied voltage 2 (note 2) vmax2 18 v maximum applied voltage 3 (note 3) vmax3 -13.5 v maximum applied voltage 4 (note 4) vmax4 6 v power dissipation (note 5) pd 2110 mw operating temperat ure range topr -30 +85 storage temperature range tstg -55 +150 (note 1) swp, vplus1, vplus2 pin (note 2) vdd3 pin (note 3) vdd4, swn pin (note 4) except note1~note3 pin (note 5) power dissipation deleting is 16.9mw/ , when it?s used in over 25 . (it?s deleting is on the board that is rohm?s standard) recommended operating conditions (vbat vio, ta=-30~85 ) parameter symbol limits unit vbat input voltage vbat 2.7 5.5 v vio pin voltage vio 1.65 3.3 v no.10033eat02
technical note 2/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu parameter symbol limits unit condition min. typ. max. circuit current vbat circuit current 1 ibat1 - 0.1 3.0 a rst=0v, vio=0v vbat circuit current 2 ibat2 - 0.5 3.0 a rst=0v, vio=1.8v vbat circuit current 3 ibat3 - 115 175 a reg1:on, io=0ma vbat circuit current 4 ibat4 - 115 175 a reg2:on, io=0ma vbat circuit current 5 ibat5 - 127 195 a reg5:on, io=0ma vbat circuit current 6 ibat6 - 145 220 a reg6:on, io=0ma vbat circuit current 7 ibat7 - 115 175 a reg7:on, io=0ma vbat circuit current 8 ibat8 - 127 195 a reg8:on, io=0ma vbat circuit current 9 ibat9 - 127 195 a rega:on, io=0ma vbat circuit current 10 ibat10 - 9 14 ma swreg3:on,reg3:on, swreg4:on, io=0ma uvlo detect voltage uvlo 2. 15 2.4 2.65 v vbat falling swreg3(step up dc/dc) output voltage 1 vopd1 - 16.5 - v io=40ma output voltage 1 vopd2 - 16.0 - v io=40ma output voltage 1 vopd3 - 14.5 - v io=40ma output current iopd - - 40 ma (note 6) efficiency effpd - (80) - % io=40ma (note 6) oscillator frequency foscpd 0.8 1.0 1.2 mhz sw saturation voltage vsatpd - 100 200 mv iin=100ma over voltage protection ovpd 18.0 18.5 19.0 v over current protection ocpd - 0.77 1 a soft start current sftpd - 300 - ma swreg4(inverted dc/dc) output voltage 1 vond1 -8.4 -8.0 -7.6 v io=40ma output voltage 2 vond2 -7.9 -7.5 -7.1 v io=40ma output voltage 2 vond3 -7.4 -7.0 -6.6 v io=40ma output current iond - - 40 ma vbat > 3.0v (note 6) efficiency effnd - (70) - % io=40ma (note 6) oscillator frequency foscnd 0.8 1.0 1.2 mhz sw saturation voltage vsatnd - 100 200 mv iin=100ma over voltage protection ovnd -10.5 -10.0 -9.5 v over current protection ocnd - 0.77 1 a soft start current sftnd - 300 - ma discharge resister at o ff roffn 0.5 1.0 1.5 k (note 6) the power efficiency changes with the fluctuat ion of external parts and the board mounting condition.
technical note 3/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu parameter symbol limits unit condition min. typ. max. reg1 (1.2v ldo) output voltage vo1 1.140 1.20 1.260 v io=210ma load stability vo11 - 10 60 mv io=1~210ma, vin1=1.8v input stability vo12 - 10 60 mv vbat=3.2~4.5v, io=210ma, vin1=1.8v ripple rejection ratio rr1 - 50 - db f=100hz, vbat(ac)=200mvp-p, vin1=1.8v, io=50ma, bw=20hz~20khz short circuit current limit ilim01 - 200 400 ma vo=0v discharge resister at off roff1 - 1.0 1.5 k ? reg2 (3.0v ldo) output voltage vo2 2.910 3.00 3.090 v io=50ma output voltage vsat2 - 0.2 0.3 v vbat=2.5v, io=50ma load stability vo21 - 10 60 mv io=1~50ma input stability vo22 - 10 60 mv vbat=3.4~4.5v, io=50ma ripple rejection ratio rr2 - 60 - db f=100hz, vbat(ac)=200mvp-p io=50ma, bw=20hz~20khz short circuit current limit ilim02 - 50 100 ma vo=0v discharge resister at off roff2 - 1.0 1.5 k ? reg3 (15v/14.5v/13v ldo) output voltage1 vo31 14.55 15.0 15.45 v io=40ma output voltage2 vo32 14.05 14.5 14.95 v io=40ma output voltage3 vo33 12.55 13.0 13.45 v io=40ma output voltage vsat3 - 0.32 0.5 v vplus2=11v, io=40ma load stability vo31 - 20 80 mv io=1 40ma input stability vo32 - 10 60 mv vplus2=16.5 17.5v, io=40ma output voltage temperature fluctuation rate vo33 - 100 - ppm/ ta = - 3 0 85 , io=40ma output ripple voltage rr3 - - 3 mvp-p io=40ma, bw=20hz 80khz (note 7) short circuit current limit ilim03 - 100 - ma vo=0v discharge resister at o ff roff3 0.5 1.0 1.5 k reg5 (1.5v/1.8v ldo) output voltage1 vo51 1. 440 1.50 1.560 v io=100ma output voltage2 vo52 1. 746 1.80 1.854 v io=100ma output voltage vsat5 - 0.09 0.14 v vin5=1.7v, io=100ma, vo=1.8v load stability vo51 - 10 60 mv io=1~100ma, vo=1.8v, vin5=2.8v input stability vo52 - 10 60 mv vbat=3.3~4.5v, io=100ma, vo=1.8v vin5=2.8v ripple rejection ratio rr5 - 50 - db f=100hz, vbat(ac)=200mvp-p, vo=1.8v vin5=2.8v, io=50ma, bw=20hz~20khz short circuit current limit ilim05 - 200 400 ma vo=0v discharge resister at off roff5 - 1.0 1.5 k ? reg6 (3.2v/3.3v ldo) output voltage1 vo61 3. 104 3.20 3.296 v io=260ma output voltage2 vo62 3. 201 3.30 3.399 v io=260ma output voltage vsat6 - 0.07 0.13 v vin6=3.2v, io=260ma, vo=3.3v load stability vo61 - 10 60 mv io=1~260ma, vo=3.3v, vin6=3.6v input stability vo62 - 10 60 mv vbat=3.4~4.5v, io=260ma, vo=3.3v vin6=3.6v ripple rejection ratio rr6 - 60 - db f=100hz, vbat(ac)=200mvp-p, vo=3.3v vin6=3.8v, io=50ma, bw=20hz~20khz short circuit current limit ilim06 - 250 500 ma vo=0v discharge resister at off roff6 - 1.0 1.5 k ? (note 7) bw: band width
technical note 4/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu parameter symbol limits unit condition min. typ. max. reg7 (3.0v/3.3v ldo) output voltage1 vo71 2. 910 3.00 3.090 v io=50ma output voltage2 vo72 3. 201 3.30 3.399 v io=50ma output voltage vsat7 - 0.2 0.3 v vbat=2.5v, io=50ma, vo=3.0v load stability vo71 - 10 60 mv io=1~50ma, vo=3.0v input stability vo72 - 10 60 mv vbat=3.4~4.5v, io=50ma, vo=3.0v ripple rejection ratio rr7 - 60 - db f=100hz, vbat(ac)=200mvp-p, vo=3.0v io=50ma, bw=20hz~20khz short circuit current limit ilim07 - 50 100 ma vo=0v discharge resister at off roff7 - 1.0 1.5 k ? reg8 (1.5v/1.8v ldo) output voltage1 vo81 1. 440 1.50 1.560 v io=100ma output voltage2 vo82 1. 746 1.80 1.854 v io=100ma output voltage vsat8 - 0.09 0.14 v vin8=1.7v, io=100ma, vo=1.8v load stability vo81 - 10 60 mv io=1~100ma, vo=1.8v, vin8=2.8v input stability vo82 - 10 60 mv vbat=3.3~4.5v, io=100ma, vo=1.8v vin8=2.8v ripple rejection ratio rr8 - 50 - db f=100hz, vbat(ac)=200mvp-p, vo=1.8v vin8=2.8v, io=50ma, bw=20hz~20khz short circuit current limit ilim08 - 200 400 ma vo=0v discharge resister at off roff8 - 1.0 1.5 k ? rega (1.5v/1.8v ldo) output voltage1 voa1 1.440 1.50 1.560 v io=100ma output voltage2 voa2 1.746 1.80 1.854 v io=100ma output voltage vsata - 0.09 0.14 v vina=1.7v, io=100ma, vo=1.8v load stability voa1 - 10 60 mv io=1~100ma, vo=1.8v, vina=2.8v input stability voa2 - 10 60 mv vbat=3.3~4.5v, io=100ma, vo=1.8v vina=2.8v ripple rejection ratio rra - 50 - db f=100hz, vbat(ac)=200mvp-p, vo=1.8v vina=2.8v, io=50ma, bw=20hz~20khz short circuit current limit ilim0a - 200 400 ma vo=0v discharge resister at off roffa - 1.0 1.5 k ? i2c input (rst, sda, scl) low level input voltage vil -0.3 - 0.25vio v high level input voltage vih 0.75vio - vbat+0.3 v hysteresis of schmitt trigge r input vhys 0.05vio - - v low level output voltage (sda) at 3ma sink current vol 0 - 0.30 v input current each i/o pin li -10 - 10 a input voltage from (0.1 x vio) to (0.9 x vio)
technical note 5/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu 0 0.5 1 1.5 2 2.5 0 25 50 75 100 125 150 ta( ) power dissipation pd w) 2210mw fig.1 power dissipation information of the rohm?s standard board material : glass-epoxy size : 50mm 58mm 1.75mm (8 layer) pattern of the board refer to after page
technical note 6/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu + - + - osc f battery vi o swp gndp vplus1 tsd over voltage limit + - gndps - + 0.08 ? driver 1 f(25v) 2.2 f(6.3v) 2.2 f(6.3v) swreg3 current sense q r s control feed back vdd2 reg2 1 f(6.3v) 3.0v iomax=50ma cpu i 2 c cont vbat1 vbat2 vbat3 vbat4 rs t vdd3 vplus2 1 f(16v) reg3 15v / 14.5v / 13v iomax=40ma vbatn2 - + vdd4 driver 0.08 ? - + vbatn1 swn current sense over voltage limit - + + - 2.2 f(6.3v) 1 f(16v) 4.7 h swreg4 q r s osc control -8v / -7.5v / -7v iomax=40ma sd a scl vbat5 vbat6 vbat7 gnd1 gnd2 gnd3 gnd4 gnd5 gnd6 gnd7 reg6 3.2v / 3.3v iomax=260ma vin6 vdd6 rb521s-30 10 h vdd1 reg1 2.2 f(6.3v) 1.2v iomax=210ma vin1 vdd5 reg5 2.2 f(6.3v) 1.5v / 1.8v iomax=100ma vin5 vdd7 reg7 1 f(6.3v) 3.0v / 3.3v iomax=50ma vdd8 reg8 2.2 f(6.3v) 1.5v / 1.8v iomax=100ma vin8 avdd rega 2.2 f(6.3v) 1.5v / 1.8v iomax=100ma vina rb521s-30 t1 t2 t3 t4 testo1 testo2 testo3 vref vref 0.1 f(6.3v) gnd8 uvlo 4.4 f(16v) 1 f(6.3v) 1 f(6.3v) 1 f(6.3v) 1 f(6.3v) 1 f(6.3v) 9.4 f(16v) 9.4 f(16v) 4.7 f(6.3v) battery 1 f(6.3v) to1 to2 to3 to4 to5 to6 to7 fig.2 block diagram / application circuit example
technical note 7/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu t4 vdd3 vplus1 vbat5 gnd6 gndp swp avdd t3 h vdd2 vbat6 vplus2 testo3 testo1 gndps vbat4 vina vin5 g vdd7 testo2 nc vdd5 vin1 f gnd7 sda vdd1 vin8 e scl vio vdd8 vdd6 d to7 rst vref vin6 c to5 to6 vbat3 gnd5 b to3 vbat7 to4 gnd1 vbat1 vbatn1 gnd3 vbat2 gnd4 a t1 to1 to2 gnd8 swn vbatn2 gnd2 vdd4 t2 1 2 3 4 5 6 7 8 9
technical note 8/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu vcsp85h4 : csp small package size : 4.8mm 2 (a difference in public : x,y both 0.05mm) height 1.0mm max a ball pitch : 0.5 mm (unit: mm)
technical note 9/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu no pin no. pin name i/o esd diode functions initial conditions for power for gnd 1 b5 vbat1 - - gnd battery is connected a 2 b8 vbat2 - - gnd battery is connected a 3 c8 vbat3 - - gnd battery is connected a 4 h7 vbat4 - - gnd battery is connected a 5 j4 vbat5 - - gnd battery is connected a 6 h2 vbat6 - - gnd battery is connected a 7 b2 vbat7 - - gnd battery is connected a 8 d8 vref o vbat gnd reference voltage output p 9 e2 vio - vbat gnd power supply for logic c 10 d2 rst i vbat gnd reset input (l: reset, h: reset cancel) h 11 f2 sda i vbat gnd i2c data input i 12 e1 scl i vbat gnd i2c clock input h 13 d1 to7 - vbat gnd test pin (open) f 14 c2 to6 - - gnd test pin (open) g 15 c1 to5 - vbat gnd test pin (open) f 16 b1 to3 - - gnd test pin open) g 17 a3 to2 - vbat gnd test pin (open) f 18 a2 to1 - - gnd test pin (open) g 19 b3 to4 - - gnd test pin (open) a 20 d9 vin6 i - gnd input voltage for reg6 (connect to vbat) a 21 e9 vdd6 o - gnd reg6 output pin q 22 j7 swp o - gnd swreg3 coil switching pin a 23 j6 gndp - vbat - swreg3 power ground b 24 h6 gndps - vbat - swreg3 power ground b 25 j3 vplus1 i - gnd swreg3 boost voltage feedback pin a 26 h3 vplus2 i - gnd input voltage forreg3 a 27 j2 vdd3 o vplus2 gnd reg3 output pin u 28 g9 vin1 i vbat gnd input voltage for reg c 29 f8 vdd1 o vbat gnd reg1 output pin q 30 h1 vdd2 o vbat gnd reg2 output pin q 31 h9 vin5 i vbat gnd input voltage for reg5 c 32 g8 vdd5 o vbat gnd reg5 output pin q 33 g1 vdd7 o vbat gnd reg7 output pin q 34 f9 vin8 i vbat gnd input voltage for reg8 c 35 e8 vdd8 o vbat gnd reg8 output pin q 36 h8 vina i vbat gnd input voltage for rega c 37 j8 avdd o vbat gnd rega output pin q 38 a6 vbatn2 i - gnd swreg4 current sense pin a 39 b6 vbatn1 i - gnd swreg4 current sense pin a 40 a5 swn o vbat - swreg4 coil switching pin b 41 a8 vdd4 i gnd - swreg4 boost voltage feedback pin v 42 a1 t1 i vbat gnd test pin s 43 a9 t2 i vbat gnd test pin s 44 j9 t3 i vbat gnd test pin s 45 j1 t4 i vbat gnd test pin s 46 h5 testo1 o - gnd test pin n 47 g2 testo2 o vbat gnd test pin m 48 h4 testo3 o - gnd test pin n 49 b4 gnd1 - vbat - ground b 50 a7 gnd2 - vbat - ground b 51 b7 gnd3 - vbat - ground b 52 b9 gnd4 - vbat - ground b 53 c9 gnd5 - vbat - ground b 54 j5 gnd6 - vbat - ground b 55 f1 gnd7 - vbat - ground b 56 a4 gnd8 - vbat - ground b 57 g7 nc - - - nc pin w
technical note 10/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu vbat c a vbat b e vbat d vbat f g vio vbat h vio vbat i vio vbat j vbat vbat l vbat vbat m vbat n vbat vbat q vbat vbat p vio vio k vbat o vbat vbat r vbat vbat s vio vbat t vplus2 u vplus2 v w open
technical note 11/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu the writing/reading operation is based on the i2c slave standard. ? slave address a7 a6 a5 a4 a3 a2 a1 r/w 0 0 0 1 0 0 1 1/0 ? bit transfer scl transfers 1-bit data during h. scl cannot change signal of sda during h at the time of bit transfer. if sda changes while scl is h, start conditions or stop conditions will occur and it will be interpreted as a control signal. sda scl data line stable; data valid change of data allowed ? start and stop condition when sda and scl are h, data is not transf erred on the i2c- bus. this condition in dicates, if sda changes from h to l while scl has been h, it will become start (s) conditions, and an access start, if sda changes from l to h while scl has been h, it will become stop (p) conditions and an access end. sda scl s p start condition stop condition ? acknowledge it transfers data 8 bits each after the occurrence of start condition. a transmitter opens sda after transfer 8bits data, and a receiver returns the acknowledge signal by setting sda to l. scl 12 89 data output by transmitter data output by receiver acknowledge not acknowledge s start condition clock pulse for acknowledgement
technical note 12/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu ? writing protocol a register address is transferred by the next 1 byte that transferred the slave address and the write-in command. the 3rd byte writes data in the internal register written in by the 2nd byte, and after 4th byte or, the increment of register address is carried out automatically. however, when a register address turns into the last address(07h), it is set to 00h by the next transmission. after the transmission end, the increment of the address is carried out. s a a a p data register address slave address from master to slave from slave to master a =acknowledge(sd a low) a =not acknowledge(sda high) s=start condition p=stop condition r/w=0(write) data a d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 0 x x x x x x x * 1 * 1 register address increment register address increment *1: write timing ? reading protocol it reads from the next byte after writing a slave address and r/w bit. the register to read considers as the following address accessed at the end, and the data of the address that carried out the increment is read after it. if an address turns into the last address(07h), the next byte will read out 00h. after the transmission end, the increment of the address is carried out. 1 s a p from master to slave from slave to master r/w=1(read) data a data slave address d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 register address increment x x x x x x x a =acknowledge(sd a low) a =not acknowledge(sda high) s=start condition p=stop condition register address increment a ? multiple reading protocols after specifying an internal address, it reads by repeated start condition and changing the data transfer direction. the data of the address that carried out the increment is read after it. if an address turns into the last address, the next byte w ill read out 00h. after the transmission end, the increment of the address is carried out. r/w=0(write) r/w=1(read) slave address register address slave address data data s a a a sr 1 0 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 x x x x x x x x x x x x x x a =acknowledge(sd a low) a =not acknowledge(sda high) s=start condition p=stop condition from master to slave from slave to master register address increment register address increment p a d7 d6 d5 d4 d3d2 d1d0 d7d6 d5d4d3d2d1d0 a sr=repeated start condition as for reading protocol and multiple reading protocols, please do a(not acknowledge) after doing the final reading operation. it stops with read when ending by a(acknowledge), and sda stops in the state of low when the reading data of that time is 0. however, this state returns usually when scl is moved, data is read, and a(not acknowledge) is done.
technical note 13/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu sda scl t su;dat t low s sr p s t buf t sp t hd;sta t su;sta t high t hd;sta t f t r t hd;dat t su;sto t r t f parameter symbol standard-mode fast-mode unit min. typ. max. min. typ. max. i 2 c bus format scl clock frequency fscl 0 - 100 0 - 400 khz low period of the scl clock tlow 4.7 - - 1.3 - - s high period of the scl clock thigh 4.0 - - 0.6 - - s hold time (repeated) start condition after this period, the first clock is generated thd;sta 4.0 - - 0.6 - - s set-up time for a repeated start condition tsu;sta 4.7 - - 0.6 - - s data hold time thd;dat 0 - 3.45 0 - 0.9 s data set-up time tsu;dat 250 - - 100 - - ns set-up time for stop condition tsu;sto 4.0 - - 0.6 - - s bus free time between a stop and start condition tbuf 4.7 - - 1.3 - - s
technical note 14/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu address register data function d7 d6 d5 d4 d3 d2 d1 d0 00h ver 2:0 - - - - sftrst software reset 01h - avdden vdd6en vdd5en vdd4en vdd3en vdd2en vdd1en power down 1 02h vdd4sel1 vdd4sel0 vdd3sel1 vdd3sel0 reserved output voltage setting1 03h avddsel vdd8sel vdd7sel reserved reserved vdd6sel reserved vdd5sel output voltage setting2 04h - - - - vdd8en vdd7en reserved swreg3en power down 2 05h reserved - - - - reserved reserved reserved for test 06h reserved for test 07h reserved for test 08h reserved for test 09h reserved for test 0ah reserved for test 0bh reserved for test input "0? for "-". input ?0? for ?reserved? access to the register for the test and the undefined register is prohibited.
technical note 15/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu register map address00h < software reset > address r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00h r/w ver[2:0] - - - - sftrst 00h initial value 20h - - - - - - initial value 20h bit [7:5] : ver[2:0] reading the version information ?001? : ds1 this register is ?read only? bit [4:1] : not used bit 0 : sftrst ?0? : reset cancel ?1? : reset (all register initializing) address01h < power down 1 > address r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 01h r/w - avdden vdd6en vdd5en vdd4en vdd3en vdd2en vdd1en initial value 00h - 0 0 0 0 0 0 0 bit 7 : not used bit 6 : avdden avdd control (on/off) ?0? : off ?1? : on bit 5 : vdd6en vdd6 control (on/off) ?0? : off ?1? : on bit 4 : vdd5en vdd5 control (on/off) ?0? : off ?1? : on bit 3 : vdd4en vdd4 control (on/off) ?0? : off ?1? : on bit 2 : vdd3en vdd3 control (on/off) ?0? : off ?1? : on bit 1 : vdd2en vdd2 control (on/off) ?0? : off ?1? : on bit 0 : vdd1en vdd1 control (on/off) ?0? : off ?1? : on
technical note 16/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu address02h < output voltage setting1 > address r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 02h r/w vdd4sel1 vdd4sel0 vdd3sel1 vdd3sel0 reserved initial value 00h 0 0 0 0 0 initial value 00h 0 bit [7:6] : vdd4sel[1:0] vdd4 output voltage ?00? : -8v ?01? : -7.5v ?10? : -7v ?11? : -7v bit [5:4] : vdd3sel[1:0] vdd3 output voltage ?00? : 14.5v ?01? : 15v ?10? : 13v ?11? : 13v bit [3:0] : not used address03h < output voltagesetting2 > address r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 03h r/w avddsel vdd8sel vdd7sel reserved reserved vdd6sel reserved vdd5sel initial value 00h 0 0 0 0 0 0 0 0 bit 7 : avddsel avdd output voltage setting ?0? : 1.5v ?1? : 1.8v bit 6 : vdd8sel vdd8 output voltage setting ?0? : 1.5v ?1? : 1.8v bit 5 : vdd7sel vdd7 output voltage setting ?0? : 3.3v ?1? : 3.0v bit [4:3] : not used bit 2 : vdd6sel vdd6 output voltage setting ?0? : 3.3v ?1? : 3.2v bit 1 : not used bit 0 : vdd5sel vdd5 output voltage setting ?0? : 1.8v ?1? : 1.5v
technical note 17/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu address04h < power down 2 > address r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 04h r/w - - - - vdd8en vdd7en reserved swreg3en initial value 00h - - - - 0 0 0 0 bit [7:4] : not used bit 3 : vdd8en vdd8 control (on/off) ?0? : off ?1? : on bit 2 : vdd7en vdd7 control (on/off) ?0? : off ?1? : on bit 1 : not used (must be ?0?) bit 0 : swreg3en swreg3 control (on/off) ?0? : off ?1? : on
technical note 18/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu 1. reset there are two kinds of reset, software reset and hardware reset. (1) software reset ? it shifts to software reset with changing a register (sftrst) setting ?0? ?1?. ? the register is returned to the initials value under the state of soft reset, and it stops accepting all address except for sftrst. ? it?s possible to release from a state of soft reset by setting register ?1? ?0?. (2) hardware reset ? it shifts to hard reset by changing rst pin ?h? ?l?. ? the condition of all registers under hardware reset pin is returned to the initial value, and it stops accepting all address. ? it?s possible to release from a state of hardware reset by setting register ?l? ?h?. (3) reset sequence ? when hardware reset was done during software reset, software reset is canceled when hard reset is canceled. (because the initial value of soft reset is ?0?) 2. thermal shutdown the blocks which thermal shutdown function is effective in swreg3 swreg4 reg1 reg2 reg3 reg5 reg6 reg7 reg8 rega a thermal shutdown function works in about 175 o c. (design reference value) when returns to undetected condition from detected condition, each block will start up simultaneously. so, if there are some problems, (for example rush current) please work out a countermeasure on system (for example sequence on start up) 3. uvlo(under voltage detection of vbat) when uvlo works, all register (except for address=00h, sftrst) will return to initial value. please set the register again after vbat comes to normal value.
technical note 19/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu 4. on/off control this ic controls each blocks by register setting after start up vref (internal reference voltage). detection voltage of vref?s rise-up is 1.1v when static output is 1.2v. the output of swreg3 is power supply for reg3, but there is no internal sequencer about these 2-blocks. please be careful about on/off timing. vref> 1.1[v] swreg3en vdd6en vref vdd3 vdd*en vdd3en reg3 (vplus2) vdd6 reg6 vdd* reg* * 1,2,5,7,8,avdd vdd4 vdd4en swreg4 swreg3 vref receives a turning on instruction blocked either each and begins rise up. therefore, it is necessary to consider the block started up first at the rise time of vref ldo on vref output ldo output 95% up worst 5ms
technical note 20/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu 5. i 2 c bus operation when a signal beyond f scl =400khz is input cannot be guaranteed, because this lsi doesn?t correspond to the h/s(high speed) mode of the i 2 c bus format. when it uses on the serial-bus-system which the f/s(fast speed) mode was mixed in with the h/s mode, please connect it and remove a connection by using the mutual connection bridge from the h/s mode section to f/s mode section or in that reverse direction. however, an optional input signal never spreads to the logic part of ic, because it stops the operation of the input buffer of sda and scl at rst pin=l. 6. low input voltage ldo this is the system of ldo that can be input low voltage. please start up ldo after input vin*, and please input vin* after input vbat. 7. power up sequence input of vbat, vio and control of each block should be done by the sequence below. enable v io rst v bat t vbaton t vbatoff t vioon=min 0.1ms t rstb=min 0.1ms t rst=min 0ms t viooff=min 1ms please take enough time for each wait time level shifter lo g ic at rst=l, output ?h? fixed en scl (sda) rst vref limiter vbat vin* vdd*
technical note 21/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu 8. start up for dc/dc dc/dc has soft start function to prevent rush current at starting up (both swreg3, swreg4) soft start time is 21ms(max) based from internal osc frequency. so, please take load current after this soft start time. swreg3 is power supply for reg3. please input the command swreg3 on after input reg3 on, to prevent rush current at start up reg3. (reg3?s rush current is prevented by swreg3?s soft start function.) at the unusual case the value of cout (capacitor connected to vout) is very large, soft start time will finish before swreg3 rise up. so, there is a possibility to appear large rush current. 9. start up for ldo ldo has soft start function to prevent rush current at starti ng up. this ic doesn?t consider the start up with the load current . please add the load current after ldo?s output voltage rise up completely. reg1, reg2, reg5, reg7, reg8, rega reg6 10. input capacitor for ldo regarding reg1,reg5,reg8,rega (can be connect with differ ent power supply from vbat), please connect capacitor with vin* to prevent the influence ripple of vin* to vout. the required value of input capacitor is changes from conditions of input voltage, output voltage, output capacitor, output impedance of power supply, wire impedance of power line, etc. so, please decide it after evaluation with real application, and with an enough margin. off sw reg3en reg3en t 1=min 0ms reg3o, vplus soft start mode normal mode ts oft =max 21ms load current enable vout off soft start mode normal mode load current reg6en reg6o off soft start mode load current normal mode 95% vout
technical note 22/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu 1 st layer(component) 2 nd layer 3 rd layer 4 th layer 5 th layer 6 th layer 7 th layer 8 th layer(solder)
technical note 23/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu (1) absolute ma ximum ratings an excess in the absolute maximum ratings, such as supply vo ltage, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify break ing mode such as a short circuit or an open circuit. if any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) power supply and ground line design pcb pattern to provide low impedance for the wiring between the power supply and the ground lines. pay attention to the interference by common impedance of layout pattern when there are plural power supplies and ground lines. especially, when there are ground pattern for small signal and ground pattern for large current included the external circuits, please separate each ground pattern. furthermore, for all power supply pins to ics, mount a capacitor between the power supply and the ground pin. at the same time, in order to use a capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (3) ground voltage make setting of the potential of the ground pin so that it will be maintained at the minimum in any operating state. furthermore, check to be sure no pins are at a potential lower than the ground voltage including an actual electric transient. (except for vdd4,swn) (4) short circuit between pins and erroneous mounting in order to mount ics on a set pcb, pay thorough attention to the direction and offset of the ics. erroneous mounting can break down the ics. furthermore, if a short circuit occurs due to foreign matters entering between pins or between the pin and the power supply or the ground pin, the ics can break down. (5) operation in strong electromagnetic field be noted that using ics in the strong electromagnetic field can malfunction them. (6) input pins in terms of the construction of ic, parasitic elements are inevitably formed in relation to potential. the operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input pin. therefore, pay thorough attention not to handle the input pins, such as to apply to the input pins a voltage lower than the ground respectively, so that any parasitic element will operate. furthermore, do not apply a voltage to the input pins when no power supply voltage is applied to the ic. in addition, even if the power supply voltage is applied, apply to the input pins a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (7) external capacitor in order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to dc bias and changes in the capacitance due to temperature, etc. (8) thermal shutdown circuit (tsd) this lsi builds in a thermal shutdown (tsd) circuit. when ju nction temperatures become detection temperature or higher, the thermal shutdown circuit operates and turns a switch off. the thermal shutdown circuit, which is aimed at isolating the lsi from thermal runaway as much as possible, is not ai med at the protection or guarantee of the lsi. therefore, do not continuously use the lsi with this circuit operating or use the lsi assuming its operation. (9) thermal design perform thermal design in which there are adequate margins by taking into account the permissible dissipation (pd) in actual states of use. (10) ldo use each output of ldo by the independence. don?t use under t he condition that each output is short-circuited because it has the possibility that an operation becomes unstable. (11) about the pin for the test, the un-use pin prevent a problem from being in the pin for the test and the un-use pin under the state of actual use. please refer to a function manual and an application notebook. and, as for the pin that doesn't specially have an explanation, ask our company person in charge. (12) about the rush current for ics with more than one power supply, it is possible that rush current may flow instantaneously due to the internal powering sequence and delays. therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of wiring. (13) about the function description or application note or more. the function description and the application notebook are the design materials to design a set. so, the contents of the materials aren't always guaranteed. please design application by having fully examination and evaluation include the external elements
technical note 24/24 www.rohm.com 2010.03 - rev.a ? 2010 rohm co., ltd. all rights reserved. bd6039gu b d 6 0 3 9 g u - e 2 part no. part no. package gu: vcsp85h4 packaging and forming specification e2: embossed tape and reel (unit : mm) vcsp85h4 (bd6039gu) 0.06 s s a b ba 0.05 89 b 5 4.80.05 p=0.58 46 d 57-0.300.05 j h 3 0.40.05 0.250.1 g a 2 p=0.58 1.0max 7 c f (0.15)index post 4.80.05 1 0.40.05 1pin mark e ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape (heat sealing method) tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2500pcs e2 () direction of feed reel 1pin
r1010 a www.rohm.com ? 2010 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the products. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redunda ncy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospac e machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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